Built-in self test (BIST) schemes can be used to test the operation of integrated circuit devices including memory devices. For memory devices, conventional approaches used to verify the BIST circuitry, itself, involve executing the BIST for a fraction of the memory array, and then migrating to a tester to check the data values in the memory array. Proper operation of the BIST can then be verified. In addition, any change to the data in the memory array caused by BIST operation can be verified by interrupting the BIST at the appropriate time. This BIST verification approach has been used by conventional integrated circuits such as that described in "A BIST Scheme Using Microprogram ROM for Large Capacity Memories," 1990 International Test Conference, pages 815-822. Other approaches for verifying BIST circuitry include using a scan or compressing the data for internal testing to a signature, which can be compared later to respectively expected scan data or expected signatures.